Prof. Castrillon and João Paulo de Lima represented the CC Chair at the 61st Design Automation Conference (DAC'24), held from June 23rd to 27th in San Francisco, California. João presented collaborative research with Prof. Mehdi Tahoori and his group at the CDNC/KIT on "SHERLOCK: Scheduling Efficient and Reliable Bulk Bitwise Operations in NVMs" through a 15-minute talk and a poster session. SHERLOCK is a novel retargetable mapping and scheduling tool designed for the efficient execution of bulk bitwise operations in non-volatile memories such as RRAM and STT-MRAM. The tool addresses a significant limitation in current logic-based Computing-in-Memory, which is typically restricted to SIMD parallelism, by providing greater flexibility to explore more forms of parallelism. Additionally, João participated in the DAC PhD Forum, presenting a poster titled "Architecture Optimization and Design Tools for CAM-based Accelerators". His poster highlighted work carried out at both UFRGS (BR) with Prof. Luigi Carro and TU Dresden over the past 5 years.

DAC'24 drew over 5,000 attendees and allowed us to meet and exchange thoughts with other researchers and designers in the ecosystem.