cfaed Seminar Series

The information infrastructure is growing and becoming ubiquitous around us. Continuous connectivity, which we take for granted now, did not exist 10 years ago. This growth has been largely fueled by the scaling of the transistors which has allowed increased performance for comparable energy consumption and lower cost. Continuing growth further will demand a variety of electronic systems with different performance and energy efficiency requirements to satisfy a large set of functionality and cost needs.
Early on, the scaling of the transistors was driven by the lithographic improvements. More recently, the scaling is that of the performance and relies on new materials (high K dielectrics and metal gates) and on devices structure innovations (fully-depleted channel devices). The performance scaling of the next decade will likely bring concerted changes not only at the transistor level but also at the interconnect and at the architecture level as the 3rd dimension will be conquered.
The pace of innovation will like continue further as it is driven by technological needs. The scaling of the transistor will be influenced by fundamental physical limits of device switching. As these fundamental limits are reached revolutionary devices that do not rely on simple charge states will likely be used. Devices which employ spin, exciton or plasmon states as the information carrier and state variable have already been proposed and are being actively investigated as replacements for the CMOS transistors.
At imec, we are a investigating not only advanced CMOS devices and “end of the roadmap” transistors, but also Beyond CMOS devices which rely on new materials like graphene and 2D semiconductors and devices that employ a different state variable. This talk will outline these activities.