Device Modeling Group for Emerging Electronics

banner martin claus

Group Leader:

Dr. Martin Claus

 

Research Vision: Towards 1D Electronics

Established semiconductor technologies based on bulk (i. e. three-dimensional) or quasi two-dimensional charge carrier transport (i. e. at the surface) will reach their physical limits in the near future. Alternative developments which allow continuous improvements of the electronic properties towards higher operating frequencies and lower power consumption as well as the exploration of new applications such as printed and wearable electronics have been pursued for many years.

From various approaches, nanostructures which allow a (quasi-) one-dimensional (1D) transport have been identified as a technology with a potential to be transferred from science to industry. To this material class belong nanowires and -tubes with a nanometer scaled diameter. The reason for the high interest in these nanostructures is related to the exceptional intrinsic material properties such as high carrier velocity, low noise and reduced self-heating. At transistor level it is expected that these material properties lead to improved electrical transistor characteristics such as lower power supply voltages, less signal distortion and for some materials higher working frequencies. On circuit level, high energy efficiency and gain at moderate fabrication costs are claimed.

Most research activities in the field of 1D electronics are focused world wide on the exploration of material properties. From an application point of view, most often only digital circuit design is addressed with the goal to replace the active silicon CMOS area with a single nanowire or -tube which is technologically very challenging. On the other side, there is a great demand for improvements of analog applications such as high-frequency power amplifiers or low-voltage low-noise receiver circuits. 1D nanostructures with multiple parallel nanotubes or -wires in the channel appear to be best suited for these applications with relaxed constraints on the technology compared to digital applications. However, in the literature only few information are available and quasi no matured technology is described with which the potential of 1D nanostructures for analog applications can be experimentally verified.

We are addressing these issues by developing and working with different simulation tools at the various abstraction levels and by a tight cooperation with experimental groups.

 

Research Topics

  • Multiscale modeling framework (from atomistic up to compact models) for 1D-electronics with focus on CNTFETs and Nanowire FETs
  • Technologies and materials for THz electronics
  • Application oriented evaluation of novel transistor technologies using numerical device simulation, physical analysis, electrical device characterization and benchmark circuit design
  • Modeling and simulation of organic FETs