Gerald Hempel




Visitor's Address

+49 (0)351 463 42440

+49 (0)351 463 39995

Georg-Schumann-Str. 7A
2nd floor, room 205
01187 Dresden


Curriculum Vitæ

Gerald has a background in software development for embedded systems and hardware engineering with a Diploma in Information Systems Technology from TU Dresden. In the past he worked as a research assistant at the Chair for Embedded Systems at TU Dresden. There, he mainly worked on hardware/software co-design and development-tools for FPGA-based embedded systems. In this context, he developed a GCC-based compiler plugin that automatically identifies suitable C-code and generates hardware accelerators for FPGA-SoCs. He joined the Chair for Compiler Construction in April 2016.

Gerald's current research seeks to apply bio-inspired algorithms for problems of software synthesis for heterogeneous multi-core architectures. His work is part of a collaborative project between the Orchestration and the Biological Systems Paths in cfaed.

His current scientific interests include:

  • Automatic extraction and integration of hardware accelerators from high-level programming languages
  • Polyhedral program analysis for high-level-synthesis
  • Alternative embedded programming concepts
  • Bio-inspired algorithms and optimizations

  • 2017

  • Gerald Hempel, Andrés Goens, Josefine Asmus, Jeronimo Castrillon, Ivo F. Sbalzarini, "Robust Mapping of Process Networks to Many-Core Systems Using Bio-Inspired Design Centering" , Proceedings of the 20th International Workshop on Software and Compilers for Embedded Systems (SCOPES 17), ACM, pp. 21–30, New York, NY, USA, Jun 2017. [doi] [Bibtex & Downloads]
  • 2015

  • Markus Vogt, Gerald Hempel, Jeronimo Castrillon, Christian Hochberger, "GCC-Plugin for Automated Accelerator Generation and Integration on Hybrid FPGA-SoCs" , Proceedings of the Second International Workshop on FPGAs for Software Programmers (FSP), Sep 2015. ([link]) [Bibtex & Downloads]
  • Gerald Hempel, Markus Vogt, Jeronimo Castrillon, Christian Hochberger, "Software-Backed Caching and Virtual Addressing for Generated Accelerators in SoC FPGAs" , Proceedings of 41st EUROMICRO Conference on Software Engineering and Advanced Applications - Work in Progress Session (Grosspietsch, Erwin and Klöckner, Konrad) , SEA-Publications: SEA-SR-44, Funchal, Madeira (Portugal), August 2015. [Bibtex & Downloads]