Research Area B – Systems & Integration

Research Area B will focus on connecting the devices using innovative and configurable routing schemes and starting the research from the circuit and system level in parallel to the device level. As the demonstrator platforms are not yet defined, Research Area B will evaluate existing system approaches and amplify them with the design parameters of the new implemented devices taken from Research Area A. The degrees of freedom are huge in terms of scale: starting on simulation of the analog behavior of a circuit and build upon these results to implement functional blocks and going further all the way to the system level design.

Intermediate Goals of Research Area B

  • Explore innovative reconfigurable routing schemes
  • First demonstration of the co-integration of two BEOL devices using a very important element, a 1T1R element, as an example
  • Evaluate circuit options that can be implemented using available first guess parameters for the envisioned device set
  • Identify missing devices that would generate a big benefit
  • Identify the risk of creating local crowding of heat generation and generate first ideas to avoid hot spots in the system by circuit and system measures
  • Define requirements for possible heat distribution layers
  • Establish first steps towards a research type design environment
  • Lay the foundation for system-level design exploration and workload mapping methodologies
  • Develop algorithms to design circuits using the project’s BEOL compatible devices

Long-term Goals of Research Area B

  • Define and realize lab scale demonstrators
  • Define and simulate medium scale demonstrators and show the path towards large scale demonstrators
  • Define device combinations that make sense in individual layers and across layers
  • Explore new possibilities by 3D interconnection of active devices and the close vicinity of switches and memory cells
  • Provide a research type electronic design flow and show the path towards a commercial version
  • Quantify the benefits of the ABEOL architecture as a function of technology nodes, number of active layers and different scenarios for the layer combinations in individual layers