Prof. Vijaykrishnan Narayanan , The Pennsylvania State University
Ferroelectric-based Logic and Memory Architectures
Werner-Hartmann-Bau, Room WHB 205 , Nöthnitzer Straße 66 , 01187 Dresden // online access details below
In the last decade, there have been major changes in the families of ferroelectric materials available for integration with CMOS electronics. This talk will discuss the possibility of exploiting the 3rd dimension in microelectronics for functions beyond interconnect optimization, enabling 3D non-von Neumann computer architectures exploiting ferroelectrics for local memory, logic in memory, digital/analog computation, and neuromorphic/reconfigurable functionality. This approach circumvents the end of Moore’s law in 2D scaling, while simultaneously overcoming the “von Neumann bottleneck” in moving instructions and data between separate logic and memory circuits. The talk will cover circuit and architectural features leveraging the non-volatile properties of ferro-electric FETs for hardware obfuscation, accelerator designs and in-memory compute structures.
Biography: Vijaykrishnan Narayanan is the Robert Noll Chair of Computer Science and Engineering at The Pennsylvania State University. His research interests are in computer architecture, design using emerging technologies, and embedded systems. He is a recipient of the 2021 IEEE Computer Society Edward McCluskey Technical Achievement Award, and 2021 IEEECS TCVLSI Distinguished Research Award. He serves as the Associate Director of the DoE 3DFeM Center and a thrust leader for the DARPA/SRC Center for Brain Inspired Computing. He is a Fellow of the IEEE, ACM and National Academy of Inventors.
Meeting ID: 886 4410 0112