cfaed Seminar Series
Prof. Christian Pilato , Politecnico di Milano, Italy
Electronic system-level design for data and IP protection
, 09:30 - 10:30
Host: Prof. Akash Kumar , Zoom (details below)
The globalization of the electronics supply chain allows for the reduction of chip manufacturing costs but poses new security threats. Untrusted foundries can steal the intellectual property in the chips, while malicious users can tamper with the systems to harm their execution or steal sensitive information. The design of next-generation systems demands the introduction of such security concepts at higher levels of abstraction.
In this talk, I will present an overview of the security concerns in the design of heterogeneous system-on-chip architectures. I will also discuss how traditional methods for electronic system-level design can be extended to design and prototype architectures with secure communications, to automatically synthesize security countermeasures, and to protect existing IP hardware modules.
Christian Pilato is a Tenure-Track Assistant Professor at Politecnico di Milano. He was a Post-doc Research Scientist at Columbia University (2013-2016) and at the ALaRI Institute of the Università della Svizzera italiana (2016-2018). He was also a Visiting Researcher at New York University, Delft University of Technology, and Chalmers University of Technology. He has a Ph.D. in Information Technology from Politecnico di Milano (2011). His research interests focus on the design, optimization, and prototyping of heterogeneous system-on-chip architectures and reconfigurable systems, with emphasis on memory and security aspects. Starting from October 2020, he is the Scientific Coordinator of the H2020 EVEREST project. He served as program chair of EUC 2014 and is currently serving in the program committees of many conferences on EDA, CAD, embedded systems, and reconfigurable architectures (DAC, ICCAD, DATE, CASES, FPL, ICCD, etc.) He is a Senior Member of IEEE and ACM, and a Member of HiPEAC.
Meeting ID: 821 2883 4386