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Approximate computing exploits the fact that there are many error-resilient applications (such as image processing, deep learning, and data mining) in which the quality of the result can be traded for energy. An open problem is how to effectively approximate hardware and software, i.e., simplifying or modifying digital circuits and programs so that the resulting application error is acceptable for the end-user and the energy requirements are satisfied for challenging deployments on resource-constrained devices. We will present a design automation method capable of creating high-quality implementations of approximate digital circuits. The method is based on multi-objective genetic programming. It employs various techniques such as relaxed equivalence checking, optimized search strategies, and genetic operators to eliminate scalability problems typical for design automation approaches. The method was used to design an open-source library of approximate adders and multipliers (EvoApproxLib) and other resource-aware solutions such as image filters, hash functions, and convolutional neural networks.

Biography

Prof. Lukáš Sekanina received all his degrees from the Brno University of Technology, Czech Republic (Ing. in 1999, Ph.D. in 2002), where he is currently a full professor and Head of the Department of Computer Systems. In his research, he combines computational intelligence (evolutionary design, neural networks, cellular automata) and hardware design methods to automatically produce complex digital circuits and hardware accelerators exhibiting high-quality properties (such as high performance and low power). He was awarded the Fulbright scholarship and worked on the evolutionary circuit design with NASA Jet Propulsion Laboratory in Pasadena in 2004. He was a visiting lecturer with Pennsylvania State University (2001), Universidad Politécnica de Madrid (2012), and a visiting researcher with the University of Oslo in 2001. He has worked as an associate editor of IEEE Transactions on Evolutionary Computation and an editorial board member of the Genetic Programming and Evolvable Machines Journal. He served as General Chair of DDECS 2013, Program Co-Chair of DDECS 2021, EuroGP 2018 - 2019, DTIS 2016, ICES 2008, Topic chair of DATE 2020 – 2022, and D-Track chair of DATE 2023. He co-authored one patent and over 200 papers mainly on evolvable hardware, approximate circuits, neural hardware, and genetic programming. He is a Senior Member of IEEE.