MOS-AK Workshop in DATE Timeframe
, 09:00 - 16:00
Center for Advancing Electronics Dresden (cfaed), "The Villa" , Würzburger Straße 46 , 01187 Dresden
In the timeframe of DATE Conference, a HiTech forum is going to take place in the cfaed Villa. It's aim is to discuss the frontiers of electron device modeling with emphasis on simulation-aware compact/SPICE models and its Verilog-A standardization.
MOS-AK Meetings are organized with aims to strengthen a network and discussion forum among experts in the field, enhance open platform for information exchange related to compact/Spice modeling and Verilog-A standardization, bring people in the compact modeling field together, as well as obtain feedback from technology developers, circuit designers, and CAD tool vendors. The topics cover all important aspects of compact model development, implementation, deployment and standardization within the main theme - frontiers of the compact modeling for nm-scale MEMS designs and CMOS/SOI circuit simulation.
The specific workshop goal will be to classify the most important directions for the future development of the electron device models, not limiting the discussion to compact models, but including physical, analytical and numerical models, to clearly identify areas that need further research and possible contact points between the different modeling domains. This workshop is designed for device process engineers (CMOS, SOI, BiCMOS, SiGe) who are interested in device modeling; ICs designers (RF/Analog/Mixed-Signal/SoC) and those starting in that area as well as device characterization, modeling and parameter extraction engineers. The content will be beneficial for anyone who needs to learn what is really behind the IC simulation in modern device models.