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Column Scan Acceleration in Hybrid CPU-FPGA Systems
Reference
Nusrat Jahan Lisa andAnnett Ungethüm andDirk Habich andWolfgang Lehner andTuan D. A. Nguyen andAkash Kumar, "Column Scan Acceleration in Hybrid CPU-FPGA Systems", In Proceeding: International Workshop on Accelerating Analytics and Data Management Systems Using Modern Processor and Storage Architectures, ADMS@VLDB 2018, Rio de Janeiro, Brazil, August 27, 2018., pp. 22–33, 2018.
Bibtex
@inproceedings{DBLP:conf/vldb/LisaUHLN018,
author = {Nusrat Jahan Lisa and
Annett Ungeth{\"{u}}m and
Dirk Habich and
Wolfgang Lehner and
Tuan D. A. Nguyen and
Akash Kumar},
title = {Column Scan Acceleration in Hybrid {CPU-FPGA} Systems},
booktitle = {International Workshop on Accelerating Analytics and Data Management
Systems Using Modern Processor and Storage Architectures, ADMS@VLDB
2018, Rio de Janeiro, Brazil, August 27, 2018.},
pages = {22--33},
year = {2018},
crossref = {DBLP:conf/vldb/2018adms},
url = {http://www.adms-conf.org/2018-camera-ready/habich\_adms2018.pdf},
timestamp = {Mon, 01 Oct 2018 14:04:28 +0200},
biburl = {https://dblp.org/rec/bib/conf/vldb/LisaUHLN018},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
author = {Nusrat Jahan Lisa and
Annett Ungeth{\"{u}}m and
Dirk Habich and
Wolfgang Lehner and
Tuan D. A. Nguyen and
Akash Kumar},
title = {Column Scan Acceleration in Hybrid {CPU-FPGA} Systems},
booktitle = {International Workshop on Accelerating Analytics and Data Management
Systems Using Modern Processor and Storage Architectures, ADMS@VLDB
2018, Rio de Janeiro, Brazil, August 27, 2018.},
pages = {22--33},
year = {2018},
crossref = {DBLP:conf/vldb/2018adms},
url = {http://www.adms-conf.org/2018-camera-ready/habich\_adms2018.pdf},
timestamp = {Mon, 01 Oct 2018 14:04:28 +0200},
biburl = {https://dblp.org/rec/bib/conf/vldb/LisaUHLN018},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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