1. CirroStrato: Synthesis and layout tools for IP protection based on reconfigurable transistors (more information).
2. SecuReFET: Secure Circuits through inherent Reconfigurable FET (more information).
3. PRÄKLIMA FASSADE: Predictive self-learning facade design for smart energy buildings (more information).
4. HANS: A framework for distributed ANN inference on heterogeneous edge devices (more information).
5. SARA: Safety-Aware Relocation of functions in a multi-core computer Architecture (more information).
6. Labview System-on-chip design methodology, 280,000 Euro, 2019.
7. ReAp: Runtime reconfigurable approximate architecture, 191,900 Euro, 2018 (more information).
8. FPGA Floorplanner for partially reconfigurable systems, 103,500 Euro, 2016 (more information).
9. Digital Hardware for Approximate Computing of Deep Neural Networks (co-supervision of PhD student, since 2018).
10. Research and Development of Partially Reconfigurable Embedded Deep Learning Inference Accelerator (co-supervision of MSc student, 2020).
11. Co-Design of Algorithms and Hardware for Low-Power Machine Learning Inference (co-supervision of MSc student, 2020).
12. Emulation platform for wildly heterogeneous chips, 40,000 Euro, 2017 (funded by Cfaed Cluster of Excellence, Orchestration seed grant).
13. Enabling very large-scale integration for novel materials, 45,000 Euro, 2016 (funded by Cfaed Cluster of Excellence, Orchestration seed grant).