Customizing Approximate Arithmetic Blocks for FPGA

Approximate Computing has emerged as a new paradigm for building highly power-efficient on-chip systems. The implicit assumption of most of the standard low-power techniques was based on precise computing, i.e., the underlying hardware provides accurate results. However, continuing to support precise computing is most likely not a way to solve upcoming power-efficiency challenges. Approximate Computing relaxes the bounds of precise computation, thereby providing new opportunities for power savings and may bear orders of magnitude in performance/power benefits. Recent research studies by several companies (like Intel, IBM, and Microsoft), and research groups have demonstrated that applying hardware approximations may provide 4x-60x energy reductions. These research studies have shown that there is a large body of power-hungry applications from several domains like image and video processing, computer vision, Big Data, and Recognition, Mining and Synthesis (RMS), which are amenable to approximate computing due to their inherent resilience to approximation errors and can still produce output of acceptable quality. State-of-the-art has developed approximate hardware designs to perform a computation approximation, with certain basic hardware blocks. For example, approximate designs only for the Ripple Carry Adders which has higher potential for the approximation, but ignoring the other types of widely used adders like: Kogge Stone adder, Carry look ahead, and Carry Sum, Carry Save adder.

 

 

Goals of this Thesis and Potential Tasks (Contact for more Discussion):

  • Developing an approximate FPGA-specific library for different arithmetic modules like adders, multipliers, dividers, and logical operations.
  • Developing complex multi-bit approximate functions and accelerators for FPGAs.
  • Interfacing custom instructions and FPGAs to soft cores (e.g. Microblaze) and using SDSoC Framework.
  • Developing functionally equivalent software models, e.g., using C or C++ and testing in different benchmark applications.
  • Open-sourcing and Documentation.

 

Skills acquired in this Thesis:

  • Hands-on experience on FPGA development and new SDSoC framework.
  • Computer Arithmetic and Hardware Optimization.
  • In-depth technical knowledge on the cutting-edge research topic and emerging computing paradigms.
  • Problem analysis and exploration of novel solutions for real-world problems.
  • Open-Sourcing.
  • Team work and experience in an international environment.
  • Professional grade technical writing.

 

Pre-Requisite (But not fully required!):

  • Knowledge of Computer architecture, C or C++ or MATLAB.
  • VHDL programming (beneficial if known and practiced in some labs)

 

Contact information:

 

Approximate Image Processing on FPGA

Image and video processing applications are well-known for their processing and power-hungry nature. Therefore, low-power implementation on such applications on resource-constrained devices poses several challenges. Approximate Computing has emerged as a new paradigm for building highly power-efficient on-chip systems. The implicit assumption of most of the standard low-power techniques was based on precise computing, i.e., the underlying hardware provides accurate results. However, continuing to support precise computing is most likely not a way to solve upcoming power-efficiency challenges. Approximate Computing relaxes the bounds of precise computation, thereby providing new opportunities for power savings and may bear orders of magnitude in performance/power benefits. Recent research studies by several companies (like Intel, IBM, and Microsoft), and research groups have demonstrated that applying hardware approximations may provide 4x-60x energy reductions. These research studies have shown that there is a large body of power-hungry applications from several domains like image and video processing, computer vision, Big Data, and Recognition, Mining and Synthesis (RMS), which are amenable to approximate computing due to their inherent resilience to approximation errors and can still produce output of acceptable quality.

 

Goals of this Thesis and Potential Tasks (Contact for more Discussion):

  • Developing image processing algorithms, like pre-processing and post-processing filters, edge detection, line detection, object detection, face recognition, and motion tracking.
  • Hardware development, testing, performance and power analysis for FPGA-based systems.
  • Research and Development of novel computation and data approximation techniques.

 

Skills acquired in this Thesis:

  • Hands-on experience on FPGA development.
  • In-depth technical knowledge on the cutting-edge research topic and emerging computing paradigms.
  • Problem analysis and exploration of novel solutions for real-world problems.
  • Team work and experience in an international environment.
  • Professional grade technical writing.

 

Pre-Requisite:

  • Knowledge of Computer architecture.
  • VHDL programming (beneficial if known and practiced in some labs)

 

Helpful Skills:

  • Knowledge about image processing algorithms

 

Contact information:

 

 

 

Whiteboard Ink Reader

White boards are a useful tool for teaching, brain storming and note-taking for collaborative work.  Often, ideas are created, elaborated and dismissed in quick succession. Sometimes it is desirable to have access to the products of this process, maybe for creating slides, or reiterating Ideas later-on.  Current solutions are mostly focused on fully digital whiteboard implementations, where digitizers are used to create a projected image. These systems are not only expensive, but influence the way in which the whiteboard is used.  For example, it is no longer possible to simply wipe away parts of the image with the fingertip.  In this project, we look for a solution which allows the use of commonly available components to create a system that can capture whiteboard content as it is created, in a format suitable for storage and further processing, such as shape recognition.

Goals of this Thesis

  • Use one or more image capture devices (e.g. smart phones, webcams) to record whiteboard content incrementally
  • Combine and analyze images, centrally or distributed (e.g. smart phone, Raspberry Pi, FPGA Board)
  • Store result in a format suitable for further processing and presentation

 

Potential Tasks

  • Research strengths and weaknesses of existing solutions
  • Smart Phone App development
  • Image processing for FPGA/GPU

 

Pre-Requisites

  • Embedded Development experience (e.g. Raspberry Pi, Microcontroller Development)
  • Image processing fundamentals

 

Helpful Skills

  • FPGA development, preferably VHDL
  • Smart phone app development experience

 

Contact information for more details:

References

  • He, Liu, Zhang, "Why take notes? Use the whiteboard capture system", in: 2003 IEEE International Conference on Acoustics, Speech, and Signal Processing, 2003. Proceedings. (ICASSP '03), 2003
  • He, Zhang, "Real-time whiteboard capture and processing using a video camera for teleconferencing", in: /Proceedings. (ICASSP '05). IEEE International Conference on Acoustics, Speech, and Signal Processing/, 2005., 2005