Chair News

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We congratulate Robert Khasanov for having successfully defended his PhD on March 25, 2025 on “Adaptive and Energy-efficient Management for Heterogeneous Multi-core Architectures”. Robert spent several years with us at the Chair for Compiler Construction where he greatly contributed to teaching and research, beyond the main topic of his dissertation. His work started in the context of the Collaborative Research Center "Highly Adaptive Energy-Efficient Computing" (HAEC). He made important contributions to methodologies to efficiently execute multiple applications, with publications in DATE, CASES, and ASP-DAC among others. We look forward to Robert's immediate future at the CC chair and to his further career steps!

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It was a very insightful week during this year’s cluster of conferences CC/CGO/HPCA/PPoPP in Las Vegas, USA, March 1 - March 5, 2023. The CC chair presented two papers at CC’25, both with tested and reproducible artefacts. In a collaboration with Fernando Magno Quintão Pereira, we developed "A Comparative Study on the Accuracy and the Speed of Static and Dynamic Program Classifiers”, which analyses the difference in accuracy of program classification when using different types of histograms as program representations (on x86 code or LLVM IR, with static or dynamic information), while testing for robustness to code obfuscation. Alex Brauckmann, a previous researcher at the CC Chair, presented "DFA-Net: A Compiler-Specific Neural Architecture for Robust Generalization in Data Flow Analyses”, which resulted from a collaboration with Meta AI and Mike O’Boyle. The paper describes a novel ML architecture that greatly outperforms standard ones in terms of generalization power for classical compiler analyses. 

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We are pleased to announce that the Chair for Compiler Construction was represented at the Dagstuhl Seminar 25091, titled "Tradeoffs in Reactive Systems Design," held from February 23 to 28, 2025, at Schloss Dagstuhl in Wadern, Germany.
The seminar focused on balancing conflicting requirements such as predictability, robustness, timeliness, adaptability, safety, security, and accessibility in reactive systems. Prof. Jerónimo Castrillón, one of the organizers, collaborated with Chadlia Jerad (University of Manouba, Tunisia), Edward A. Lee (University of California, Berkeley, USA), and Claire Pagetti (ONERA, Toulouse, France) to bring together experts from academia and industry.
Participants discussed the inherent tradeoffs in designing reactive systems—software systems that continuously interact with their environment, such as those used in autonomous vehicles and industrial automation. The seminar featured insightful talks, hands-on sessions, and tool demonstrations, fostering a collaborative environment to advance research in reactive systems design. It provided a unique platform for exchanging ideas, building partnerships, and driving innovation in the field.

 

 

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We congratulate Lars Schütze for having successfully defended his PhD on December 18th, 2024 on “Runtime Optimization of Contextual Role-oriented Programming Languages”. Lars has been several years at the Chair for Compiler Construction where he greatly contributed to teaching and research, beyond the main topic of his dissertation. His work started in the context of the “Role-based Software Infrastructures for continuous-context-sensitive Systems” (ROSI) which proposed role modeling and Role- Oriented Programming (ROP) as evolution of traditional Object-Oriented Programming (OOP). In his dissertation, Lars advances the area of compilers and virtual environments for efficient dynamic dispatch We are happy that Lars will stay as postdoctoral researcher at the CC chair and look forward to working with him on new research directions. 

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We are pleased to welcome Mees Frensel as the newest member of the CC Chair! Mees completed his master’s degree in Computer Engineering at TU Delft in 2024. His thesis, supervised by Prof. Zaid Al-Ars, focused on efficient, high-throughput nanopore DNA base-calling. He used model compression techniques, such as pruning, to reduce the size of an LSTM-based deep learning model without compromising accuracy. With expertise in DNA sequence analysis pipelines, Mees will be working on the genomICs project, led by Asif Khan, that aims to accelerate sequence analysis pipelines using emerging near-memory and in-memory computing architectures. We are excited to have Mees on board and look forward to working with him!

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The CC Chair was quite busy during the Embedded Systems Week (ESWeek) 2024, held in Raleigh, North Carolina, USA, in the first week of October. On Sunday, Joao talked about emerging main memory simulation in the tutorial “Disruptive Memory Technologies: A Tutorial and Unified Simulation Framework” organised by Jian-Jia Chen, Joerg Henkel and Lokesh Siddhu. The simulation infrastructure code is publicly available. As program co-chair of the International Conference on Compilers, Architectures, and Synthesis for Embedded Systems (CASES), Prof. Castrillon had the privilege of presenting several awards during the ESWeek (test of time awards and best paper award). On Tuesday, Prof. Castrillon participated in the panel “The Embedded Systems and the Environmental Crisis” organised by Prof. Alex K. Jones and co-panelists Peipei Zhou, Steve Jackson, Daniel Andresen, and Sudeep Pasricha. CASES, and its sister conferences EMSOFT and CODES-ISSS, were a great success, with lively discussions during and between sessions. After closing the conferences, speakers and organisers of the workshop “Time-Centric Reactive Software (TCRS)” met for dinner at a typical BBQ restaurant. The TCRS workshop, co-organized by Prof. Hokeun Kim and Prof. Castrillon, had several interesting talks, including a paper by Shaokhai Lin on “Navigating Time and Energy Trade-offs in Reactive Heterogeneous Systems” and several other members of the CC Chair. 

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Jiahong Bi represented the CC Chair at the Cyber-Physical System (CPS) Summer School Workshop 2024, which was held on September 16 2024 in Alghero, Italy. He presented the paper titled "Leveraging the MLIR infrastructure for the computing continuum", describing work in progress in the context of the MYRTUS EU project. In the talk and the later discussions during the poster session, Jiahong showed the current status and future improvement of the compilation framework in MYRTUS including extensions to his Master Thesis. The workshop also provided a great opportunity for networking and brainstorming in a beautiful city by the sea, which he benefited a lot across different technical topics concerning CPS.

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Julian Robledo represented the CC Chair at the Forum on specification & Design Languages (FDL) 2024, which was held from 4 to 6 September in Stockholm, Sweden. He presented our article titled "Timeline decoupling for performance in Lingua Franca". Lingua Franca is a programming framework that has gained the interest of the research community because of its deterministic and reactive nature. This presentation described a methodology to increase parallel execution of programs in Lingua Franca by decoupling timeline of components through partitions called timing enclaves. FDL provided a cozy atmosphere perfect for networking and exchanging ideas. Moreover, the social event organised at the Vasa Museum, the house of an entirely intact warship from the 17th century, was an inspiring location for exciting discussions about technical and non so technical topics.

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Prof. Castrillon deliver a talk on “High-level programming abstractions and compilation for near and in-memory computing” at the 2nd Minisymposium on Applications and Benefits of UPMEM commercial Massively Parallel Processing- In-Memory Platform (ABUMPIMP 2024) which was co-located with this year’s International European Conference on Parallel and Distributed Computing (Euro-Par 2024). In the talk, Jeronimo talked about high-level abstractions and compilation using MLIR, with focus on recent work on compilers for UPMEM and memristive crossbars (CINM), compilers for CAM-based accelerators (C4CAM) and compilers for logic-in-memory (Sherlock). The presentations touched upon projects results from EVEREST, the SPP2377 and SCADS.AI among others.

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Prof. Castrillon and João Paulo de Lima represented the CC Chair at the 61st Design Automation Conference (DAC'24), held from June 23rd to 27th in San Francisco, California. João presented collaborative research with Prof. Mehdi Tahoori and his group at the CDNC/KIT on "SHERLOCK: Scheduling Efficient and Reliable Bulk Bitwise Operations in NVMs" through a 15-minute talk and a poster session. SHERLOCK is a novel retargetable mapping and scheduling tool designed for the efficient execution of bulk bitwise operations in non-volatile memories such as RRAM and STT-MRAM. The tool addresses a significant limitation in current logic-based Computing-in-Memory, which is typically restricted to SIMD parallelism, by providing greater flexibility to explore more forms of parallelism. Additionally, João participated in the DAC PhD Forum, presenting a poster titled "Architecture Optimization and Design Tools for CAM-based Accelerators". His poster highlighted work carried out at both UFRGS (BR) with Prof. Luigi Carro and TU Dresden over the past 5 years.

DAC'24 drew over 5,000 attendees and allowed us to meet and exchange thoughts with other researchers and designers in the ecosystem.