Robert Khasanov

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E-mail

Phone

Fax

Visitor's Address

robert.khasanov@tu-dresden.de

+49 (0)351 463 39978

+49 (0)351 463 39995

Helmholtzstrasse 18
3rd floor, Room BAR III 58
01069 Dresden
Germany

 

Curriculum Vitae

Robert Khasanov has received his Bachelor's and Master’s degree in Computer Science from Moscow Institute of Physics and Technology in 2012 and 2014 respectively.  During the study, he also held positions at Intel where he was working on optimising binary translator system, and then in LLVM compiler project. In 2015 Robert carried out an internship at Scalable Parallel Computing Lab (ETH Zurich) where he was working on optimal data replication in fault tolerant distributed databases. Currently, he is working on the languages and compilers for energy-efficient programming, with particular focus on dataflow languages with implicit and explicit parallelism, compiler-runtime interaction and energy optimisations.

Publications

  • 2018

  • Robert Khasanov, Andrés Goens, Jeronimo Castrillon, "Implicit Data-Parallelism in Kahn Process Networks: Bridging the MacQueen Gap" , Proceedings of the 9th Workshop and 7th Workshop on Parallel Programming and RunTime Management Techniques for Manycore Architectures and Design Tools and Architectures for Multicore Embedded Computing Platforms (PARMA-DITAM 18), co-located with 13th International Conference on High-Performance and Embedded Architectures and Compilers (HiPEAC), ACM, pp. 20–25, New York, NY, USA, Jan 2018. [doi] [Bibtex & Downloads]
  • 2017

  • Andrés Goens, Robert Khasanov, Marcus Hähnel, Till Smejkal, Hermann Härtig, Jeronimo Castrillon, "TETRiS: a Multi-Application Run-Time System for Predictable Execution of Static Mappings" , Proceedings of the 20th International Workshop on Software and Compilers for Embedded Systems (SCOPES 17), ACM, pp. 11–20, New York, NY, USA, Jun 2017. [doi] [Bibtex & Downloads]
  • Markus Haehnel, Frehiwot Melak Arega, Waltenegus Dargie, Robert Khasanov, Jeronimo Castrillon, "Application Interference Analysis: Towards Energy-efficient Workload Management on Heterogeneous Micro-Server Architectures" , Proceedings of the 7th International Workshop on Big Data in Cloud Performance (DCPerf 17), IEEE Conference on Computer Communications Workshops (INFOCOM WKSHPS), vol. , no. , pp. 432-437, May 2017. [doi] [Bibtex & Downloads]
  • 2016

  • Andres Goens, Robert Khasanov, Jeronimo Castrillon, Simon Polstra, Andy Pimentel, "Why Comparing System-level MPSoC Mapping Approaches is Difficult: a Case Study" , Proceedings of the IEEE 10th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC-16), pp. 281-288, Ecole Centrale de Lyon, Lyon, France, Sep 2016. [doi] [Bibtex & Downloads]