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Loop overhead reduction techniques for coarse grained reconfigurable architectures
Reference
Kanishkan Vadivel, Mark Wijtvliet, Roel Jordans, Henk Corporaal, "Loop overhead reduction techniques for coarse grained reconfigurable architectures", In Proceeding: 2017 Euromicro Conference on Digital System Design (DSD), pp. 14–21, 2017.
Bibtex
@inproceedings{vadivel2017loop,
title={Loop overhead reduction techniques for coarse grained reconfigurable architectures},
author={Vadivel, Kanishkan and Wijtvliet, Mark and Jordans, Roel and Corporaal, Henk},
booktitle={2017 Euromicro Conference on Digital System Design (DSD)},
pages={14--21},
year={2017},
organization={IEEE}
}
title={Loop overhead reduction techniques for coarse grained reconfigurable architectures},
author={Vadivel, Kanishkan and Wijtvliet, Mark and Jordans, Roel and Corporaal, Henk},
booktitle={2017 Euromicro Conference on Digital System Design (DSD)},
pages={14--21},
year={2017},
organization={IEEE}
}
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