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PEAF: A Power-Efficient Architecture for SRAM-Based FPGAs Using Reconfigurable Hard Logic Design in Dark Silicon Era
Reference
Zahra Ebrahimi, Behnam Khaleghi, Hossein Asadi, "PEAF: A Power-Efficient Architecture for SRAM-Based FPGAs Using Reconfigurable Hard Logic Design in Dark Silicon Era", In Proceeding: IEEE Transactions on Computers (TC), IEEE, Dec 2017. [doi]
Bibtex
@inproceedings{TC_2017,
doi = {10.1109/TC.2016.2636141},
url = {https://ieeexplore.ieee.org/abstract/document/7775010},
year = 2017,
month = {dec},
publisher = ,
author = {Zahra Ebrahimi and Behnam Khaleghi and Hossein Asadi},
title = {PEAF: A Power-Efficient Architecture for SRAM-Based FPGAs Using Reconfigurable Hard Logic Design in Dark Silicon Era},
booktitle = {IEEE Transactions on Computers ({TC})}
}
doi = {10.1109/TC.2016.2636141},
url = {https://ieeexplore.ieee.org/abstract/document/7775010},
year = 2017,
month = {dec},
publisher = ,
author = {Zahra Ebrahimi and Behnam Khaleghi and Hossein Asadi},
title = {PEAF: A Power-Efficient Architecture for SRAM-Based FPGAs Using Reconfigurable Hard Logic Design in Dark Silicon Era},
booktitle = {IEEE Transactions on Computers ({TC})}
}
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