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Strain-engineering for improved tunneling in reconfigurable silicon nanowire transistors
Reference
Tim Baldauf, Andre Heinzig, Thomas Mikolajick, Walter Michael Weber, Jens Trommer, "Strain-engineering for improved tunneling in reconfigurable silicon nanowire transistors", In Proceeding: 2016 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS), pp. 1–4, 2016.
Bibtex
@inproceedings{baldauf2016strain,
title={Strain-engineering for improved tunneling in reconfigurable silicon nanowire transistors},
author={Baldauf, Tim and Heinzig, Andre and Mikolajick, Thomas and Weber, Walter Michael and Trommer, Jens},
booktitle={2016 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS)},
pages={1--4},
year={2016},
organization={IEEE}
}
title={Strain-engineering for improved tunneling in reconfigurable silicon nanowire transistors},
author={Baldauf, Tim and Heinzig, Andre and Mikolajick, Thomas and Weber, Walter Michael and Trommer, Jens},
booktitle={2016 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS)},
pages={1--4},
year={2016},
organization={IEEE}
}
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Related Paths
Silicon Nanowire Path, Silicon Nanowire Path, Silicon Nanowire Path
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https://cfaed.tu-dresden.de/publications?pubId=828