cfaed Publications
Area-optimized low-latency approximate multipliers for FPGA-based hardware accelerators
Reference
Salim Ullah, Semeen Rehman, Bharath Srinivas Prabakaran, Florian Kriebel, Muhammad Abdullah Hanif, Muhammad Shafique, Akash Kumar, "Area-optimized low-latency approximate multipliers for FPGA-based hardware accelerators", Proceedings of the 55th Annual Design Automation Conference, pp. 159, June 2018.
Bibtex
@inproceedings{ullah2018area,
title={Area-optimized low-latency approximate multipliers for FPGA-based hardware accelerators},
author={Ullah, Salim and Rehman, Semeen and Prabakaran, Bharath Srinivas and Kriebel, Florian and Hanif, Muhammad Abdullah and Shafique, Muhammad and Kumar, Akash},
booktitle={Proceedings of the 55th Annual Design Automation Conference},
pages={159},
year={2018},
month={June},
organization={ACM}
}
title={Area-optimized low-latency approximate multipliers for FPGA-based hardware accelerators},
author={Ullah, Salim and Rehman, Semeen and Prabakaran, Bharath Srinivas and Kriebel, Florian and Hanif, Muhammad Abdullah and Shafique, Muhammad and Kumar, Akash},
booktitle={Proceedings of the 55th Annual Design Automation Conference},
pages={159},
year={2018},
month={June},
organization={ACM}
}
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https://cfaed.tu-dresden.de/publications?pubId=2160