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Scatter Scrubbing: A Method to Reduce SEU Repair Time in FPGA Configuration Memory
Reference
M. Mousavi, H. R. Pourshaghaghi, H. Corporaal, A. Kumar, "Scatter Scrubbing: A Method to Reduce SEU Repair Time in FPGA Configuration Memory", In Proceeding: 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), pp. 1-6, Oct 2019. [doi]
Bibtex
@INPROCEEDINGS{8875431,
author={M. {Mousavi} and H. R. {Pourshaghaghi} and H. {Corporaal} and A. {Kumar}},
booktitle={2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)},
title={Scatter Scrubbing: A Method to Reduce SEU Repair Time in FPGA Configuration Memory},
year={2019},
volume={},
number={},
pages={1-6},
keywords={Field programmable gate arrays;Redundancy;Single event upsets;Maintenance engineering;Indexes;Fault tolerant systems;FPGA;fault tolerance;SEU;scrubbing;configuration memory},
doi={10.1109/DFT.2019.8875431},
ISSN={},
month={Oct},}
author={M. {Mousavi} and H. R. {Pourshaghaghi} and H. {Corporaal} and A. {Kumar}},
booktitle={2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)},
title={Scatter Scrubbing: A Method to Reduce SEU Repair Time in FPGA Configuration Memory},
year={2019},
volume={},
number={},
pages={1-6},
keywords={Field programmable gate arrays;Redundancy;Single event upsets;Maintenance engineering;Indexes;Fault tolerant systems;FPGA;fault tolerance;SEU;scrubbing;configuration memory},
doi={10.1109/DFT.2019.8875431},
ISSN={},
month={Oct},}
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