cfaed Publications

QoS-Aware Cross-Layer Reliability-Integrated FPGA-Based Dynamic Partially Reconfigurable System Partitioning

Reference

S. S. Sahoo, T. D. A. Nguyen, B. Veeravalli, A. Kumar, "QoS-Aware Cross-Layer Reliability-Integrated FPGA-Based Dynamic Partially Reconfigurable System Partitioning" , In Proceeding: 2018 International Conference on Field-Programmable Technology (FPT), pp. 230-233, Dec 2018. [doi]

Bibtex

@INPROCEEDINGS{8742320,
author={S. S. {Sahoo} and T. D. A. {Nguyen} and B. {Veeravalli} and A. {Kumar}},
booktitle={2018 International Conference on Field-Programmable Technology (FPT)},
title={QoS-Aware Cross-Layer Reliability-Integrated FPGA-Based Dynamic Partially Reconfigurable System Partitioning},
year={2018},
volume={},
number={},
pages={230-233},
keywords={circuit optimisation;field programmable gate arrays;integrated circuit design;integrated circuit reliability;logic design;quality of service;Dynamic Partial Reconfiguration;QoS-aware cross-layer reliability-integrated design methodology;FPGA-based DPR systems;FPGA-based dynamic partially reconfigurable system;partially reconfigurable modules;quality of service;fault-mitigation;Conferences;Cross-layer Reliability;Dynamic Partial Reconfiguration;Field Programmable Gate Array;Embedded Systems},
doi={10.1109/FPT.2018.00041},
ISSN={},
month={Dec},}

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https://cfaed.tu-dresden.de/publications?pubId=2548


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