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Designing Resource-Efficient Hardware Arithmetic for FPGA-Based Accelerators Leveraging Approximations and Mixed Quantizations
Reference
Salim Ullah, Siva Satyendra Sahoo, Akash Kumar, "Designing Resource-Efficient Hardware Arithmetic for FPGA-Based Accelerators Leveraging Approximations and Mixed Quantizations", Chapter in Embedded Machine Learning for Cyber-Physical, IoT, and Edge Computing, Springer International Publishing, pp. 89–119, Oct 2023. [doi]
Bibtex
@incollection{Ullah_2023,
doi = {10.1007/978-3-031-19568-6_4},
url = {https://doi.org/10.1007%2F978-3-031-19568-6_4},
year = 2023,
month = {oct},
publisher = {Springer International Publishing},
pages = {89--119},
author = {Salim Ullah and Siva Satyendra Sahoo and Akash Kumar},
title = {Designing Resource-Efficient Hardware Arithmetic for {FPGA}-Based Accelerators Leveraging Approximations and Mixed Quantizations},
booktitle = {Embedded Machine Learning for Cyber-Physical, {IoT}, and Edge Computing}
}
doi = {10.1007/978-3-031-19568-6_4},
url = {https://doi.org/10.1007%2F978-3-031-19568-6_4},
year = 2023,
month = {oct},
publisher = {Springer International Publishing},
pages = {89--119},
author = {Salim Ullah and Siva Satyendra Sahoo and Akash Kumar},
title = {Designing Resource-Efficient Hardware Arithmetic for {FPGA}-Based Accelerators Leveraging Approximations and Mixed Quantizations},
booktitle = {Embedded Machine Learning for Cyber-Physical, {IoT}, and Edge Computing}
}
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