Prof. Dr.-Ing. Jeronimo Castrillon

Portrait Prof. Jeronimo Castrillon

E-mail

Phone

Fax

Visitor's Address

jeronimo.castrillon@tu-dresden.de

+49 (0)351 463 42716

+49 (0)351 463 39995

Chair for Compiler Construction
Helmholtzstrasse 18
3rd floor, Room BAR III68
01069 Dresden
Germany

 

Curriculum Vitae

Jerónimo Castrillón received the Electronics Engineering degree with honors from the Pontificia Bolivariana University in Colombia in 2004, the master degree from the ALaRI Institute, University of Lugano, in Switzerland in 2006 and the Ph.D. degree (Dr.-Ing.) on Electric Engineering and Information Technology with honors from the RWTH Aachen University in Germany in 2013. From early 2009 to April 2013 Dr. Castrillón was the chief engineer of the chair for Software for Systems on Silicon at the RWTH Aachen University, where he was enrolled as research staff since late 2006. From April 2013 to April 2014 Dr. Castrillón was senior scientific staff in the same institution.

In June 2014, Dr. Castrillón joined the department of computer science of the TU Dresden as professor for compiler construction in the context of the German excellence cluster “Center for Advancing Electronics Dresden” (cfaed). His research interests lie on methodologies, languages, tools and algorithms for programming complex computing systems. He is also affiliated to the Center for Scalable Data Analytics and Artificial Intelligence Dresden/Leipzig (ScaDS.AI), the 6G-life Hub, and the Barkhausen Institut.

Prof. Castrillón has several international publications and has served as program chair and technical program committee in international conferences and workshops (e.g., LCTES, CASES, DAC, DATE, CODES-ISSS, CASES, CGO, Computing Frontiers, FPL, ICCS and MCSoC) as well as a reviewer for ACM and IEEE journals among others. Prof. Castrillón is the recipient of numerous awards, including the Swiss Excellence Government Scholarship in 2005 and the Intel Doctoral Award in 2012. In 2014 he co-founded Silexica GmbH, a company that provides programming tools for embedded multicore architectures, now with AMD/Xilinx.

Publications

cfaed Publications

Efficient data structures for dynamic graph analysis

Reference

Benjamin Schiller, Jeronimo Castrillon, Thorsten Strufe, "Efficient data structures for dynamic graph analysis", Proceedings of the 11th International Conference on Signal-Image Technology & Internet-Based Systems (SITIS) (Lisa O'Conner), IEEE Computer Society, pp. 497–504, Bangkok, Thailand, Nov 2015. [doi]

Bibtex

@InProceedings{schiller_sitis15,
Title={Efficient data structures for dynamic graph analysis},
Author={Schiller, Benjamin and Castrillon, Jeronimo and Strufe, Thorsten},
Booktitle={Proceedings of the 11th International Conference on Signal-Image Technology \& Internet-Based Systems (SITIS)},
Year={2015},
Address={Bangkok, Thailand},
Editor={Lisa O'Conner},
Month=nov,
Publisher={IEEE Computer Society},
Series={SITIS 2015},
pages={497--504},
doi={10.1109/SITIS.2015.94}
}

Downloads

1511_Schiller_SITIS [PDF]

Related Paths

Orchestration Path, Resilience Path, HAEC

Permalink

https://cfaed.tu-dresden.de/ccc-staff-castrillon?pubId=465


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