E-mail

Phone

Websites

Visitor's Address

zahra.ebrahimi_mamaghani@tu-dresden.de

+49 351 463-40819

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Helmholtzstrasse 18, BAR-III77

Zahra Ebrahimi obtained her B.Sc. and M.Sc. degrees from Sharif University of Technology in Iran, where she also worked as a researcher in Data Storage, Networks, & Processing (DSN) LAB. In 2018, she joined Cfaed as a research associate and has worked on the DFG-granted project "ReAp: Run-time Reconfigurable Approximate Architecture" and the ESF-granted project "Re-Learning: Self-Learning and Flexible Electronics Through Inherent Component Reconfiguration". As of 2023, she is also the project leader and manager of her own BMBF-granted proposal "X-DNet: Energy-Efficient Distributed and In-Network Computing via Approximation of Applications and Accelerators". Zahra's research interests include approximate computing, reconfigurable computing, embedded systems, and exploring energy- and performance-efficiency in various application domains.

Topics for thesis, master project, SHK/WHK, internship

These subjects are based on our current publications which will be extended for journal submissions in few months (Projects are adaptable depending on the level).

Requirements: High Motivation :), C++/Python, Verilog/VHDL, High-Level Synthesis
Beneficial: Background in machine learning, image processing, or other arbitrary domains

Energy-Efficiency of CGRAs for Edge Computing

In our recent papers (see a published one here), we have design a CGRA for an energy-efficient processing of object tracking, and medical applications at the edge. For the following up track, we want to extend the mapping support for 5G applications and looking for a 3-6 month student assistant, who is willing to be a co-author in this hot topic!

Requirements:

  • Verilog/VHDL
  • Experience with the ASIC mapping tools
Approximation of Neural Networks for 5G/6G Applications

Federated Learning and Distributed Inference are key enablers for real-time processing in 5G/6G era. To enable such compute-intensive workload at the edge, the structure of NNs should be optimized without compromising the final quality of results. In this context, Approximate Computing techniques have shown to provide highly beneficial solutions by exploiting the inherent error resiliency of ML applications. Considering such potentials, the main idea in this project is to apply various approximations, efficiently, to reduce the area/power/energy of NNs and boost their performance.

Pre-Requisites and helpful skills

  • FPGA development and programming: Verilog/VHDL,
  • High-Level-Synthesis:Vivado/Vitis HLS
  • ML: C++/Python and Tensorflow/PyTorch to implement and modify the structure of NN models

 

 

 

 

Approximate CGRA for Bio-Signal Processing (ISCAS 2021)

Approximate SIMD Multiplier-Divider (GLSVLSI 2020)

Power-Efficient Hard Logic Design for FPGAs (TC 2017)

Publications

  • 2018

  • 3. Sajjad Tamimi, Zahra Ebrahimi, Behnam Khaleghi, Hossein Asadi, "An Efficient SRAM-Based Reconfigurable Architecture for Embedded Processors", In IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 38, no. 3, pp. 466–479, Sep 2018. [doi] [Bibtex & Downloads]

  • 2014

  • 1. Ali Ahari, Behnam Khaleghi, Zahra Ebrahimi, Hossein Asadi, Mehdi B. Tahoori, "Towards dark silicon era in FPGAs using complementary hard logic design", In Proceeding: 2014 24th International Conference on Field Programmable Logic and Applications (FPL), IEEE, Sep 2014. [doi] [Bibtex & Downloads]

 

PATENT

Hossein Asadi, Zahra Ebrahimi, and Behnam Khaleghi, ”Programmable Logic Design”, US Provisional Patent, US10312918B2, 2017 (Renewed 2019).

BOOK

Zeinab Seifoori, Zahra Ebrahimi, Behnam Khaleghi, and Hossein Asadi. Introduction to emerging SRAM-based FPGA Architectures in Dark Silicon Era. In Advances in Computers, vol. 110, Elsevier, 2018.