Publications

• 2024

• 5. Maryam Eslami, Yuhao Liu, Salim Ullah, Mostafa E. Salehi, Reshad Hosseini, Seyed Ahmad Mirsalari, Akash Kumar, "MONO: Enhancing Bit-Flip Resilience With Bit Homogeneity for Neural Networks", In IEEE Embedded Systems Letters, Institute of Electrical and Electronics Engineers (IEEE), vol. 16, no. 4, pp. 333–336, Dec 2024. [doi] [Bibtex & Downloads]

  MONO: Enhancing Bit-Flip Resilience With Bit Homogeneity for Neural Networks

  Reference

  Maryam Eslami, Yuhao Liu, Salim Ullah, Mostafa E. Salehi, Reshad Hosseini, Seyed Ahmad Mirsalari, Akash Kumar, "MONO: Enhancing Bit-Flip Resilience With Bit Homogeneity for Neural Networks", In IEEE Embedded Systems Letters, Institute of Electrical and Electronics Engineers (IEEE), vol. 16, no. 4, pp. 333–336, Dec 2024. [doi]

  Bibtex

  @article{Eslami_2024, title={MONO: Enhancing Bit-Flip Resilience With Bit Homogeneity for Neural Networks}, volume={16}, ISSN={1943-0671}, url={http://dx.doi.org/10.1109/LES.2024.3444921}, DOI={10.1109/les.2024.3444921}, number={4}, journal={IEEE Embedded Systems Letters}, publisher={Institute of Electrical and Electronics Engineers (IEEE)}, author={Eslami, Maryam and Liu, Yuhao and Ullah, Salim and Salehi, Mostafa E. and Hosseini, Reshad and Ahmad Mirsalari, Seyed and Kumar, Akash}, year={2024}, month=dec, pages={333–336} }

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  https://cfaed.tu-dresden.de/publications?pubId=3771

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• 4. Yuhao Liu, Salim Ullah, Akash Kumar, "BitSys: Bitwise Systolic Array Architecture for Multi-precision Quantized Hardware Accelerators", In Proceeding: 2024 IEEE 32nd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), IEEE, pp. 220–220, May 2024. [doi] [Bibtex & Downloads]

  BitSys: Bitwise Systolic Array Architecture for Multi-precision Quantized Hardware Accelerators

  Reference

  Yuhao Liu, Salim Ullah, Akash Kumar, "BitSys: Bitwise Systolic Array Architecture for Multi-precision Quantized Hardware Accelerators", In Proceeding: 2024 IEEE 32nd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), IEEE, pp. 220–220, May 2024. [doi]

  Bibtex

  @inproceedings{Liu_2024, title={BitSys: Bitwise Systolic Array Architecture for Multi-precision Quantized Hardware Accelerators}, url={http://dx.doi.org/10.1109/fccm60383.2024.00042}, DOI={10.1109/fccm60383.2024.00042}, booktitle={2024 IEEE 32nd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)}, publisher={IEEE}, author={Liu, Yuhao and Ullah, Salim and Kumar, Akash}, year={2024}, month=may, pages={220–220} }

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  FCCM_Poster_Final_3 [PDF]

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  https://cfaed.tu-dresden.de/publications?pubId=3737

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• 2023

• 3. Yuhao Liu, Shubham Rai, Salim Ullah, Akash Kumar, "High Flexibility Designs of Quantized Runtime Reconfigurable Multi-Precision Multipliers", In IEEE Embedded Systems Letters, pp. 1-1, 2023. [doi] [Bibtex & Downloads]

  High Flexibility Designs of Quantized Runtime Reconfigurable Multi-Precision Multipliers

  Reference

  Yuhao Liu, Shubham Rai, Salim Ullah, Akash Kumar, "High Flexibility Designs of Quantized Runtime Reconfigurable Multi-Precision Multipliers", In IEEE Embedded Systems Letters, pp. 1-1, 2023. [doi]

  Bibtex

  @ARTICLE{10261986,
  author={Liu, Yuhao and Rai, Shubham and Ullah, Salim and Kumar, Akash},
  journal={IEEE Embedded Systems Letters},
  title={High Flexibility Designs of Quantized Runtime Reconfigurable Multi-Precision Multipliers},
  year={2023},
  volume={},
  number={},
  pages={1-1},
  doi={10.1109/LES.2023.3298736}}

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  ESL_LB_CASES_2023 Camera ready [PDF]

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  https://cfaed.tu-dresden.de/publications?pubId=3568

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• 2. Yuhao Liu, Shubham Rai, Salim Ullah, Akash Kumar, "NetPU-M: a Generic Reconfigurable Neural Network Accelerator Architecture for MLPs", In Proceeding: 2023 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), pp. 85-92, 2023. [doi] [Bibtex & Downloads]

  NetPU-M: a Generic Reconfigurable Neural Network Accelerator Architecture for MLPs

  Reference

  Yuhao Liu, Shubham Rai, Salim Ullah, Akash Kumar, "NetPU-M: a Generic Reconfigurable Neural Network Accelerator Architecture for MLPs", In Proceeding: 2023 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), pp. 85-92, 2023. [doi]

  Bibtex

  @INPROCEEDINGS{10196610,
  author={Liu, Yuhao and Rai, Shubham and Ullah, Salim and Kumar, Akash},
  booktitle={2023 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)},
  title={NetPU-M: a Generic Reconfigurable Neural Network Accelerator Architecture for MLPs},
  year={2023},
  volume={},
  number={},
  pages={85-92},
  doi={10.1109/IPDPSW59300.2023.00026}}

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  RAW2023-NetPU-M [PDF]

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  https://cfaed.tu-dresden.de/publications?pubId=3560

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• 2022

• 1. Yuhao Liu, Shubham Rai, Salim Ullah, Akash Kumar, "NetPU: Prototyping a Generic Reconfigurable Neural Network Accelerator Architecture", In Proceeding: 2022 International Conference on Field-Programmable Technology (ICFPT), pp. 1-1, Dec 2022. [doi] [Bibtex & Downloads]

  NetPU: Prototyping a Generic Reconfigurable Neural Network Accelerator Architecture

  Reference

  Yuhao Liu, Shubham Rai, Salim Ullah, Akash Kumar, "NetPU: Prototyping a Generic Reconfigurable Neural Network Accelerator Architecture", In Proceeding: 2022 International Conference on Field-Programmable Technology (ICFPT), pp. 1-1, Dec 2022. [doi]

  Bibtex

  @INPROCEEDINGS{9974206,
  
  author={Liu, Yuhao and Rai, Shubham and Ullah, Salim and Kumar, Akash},
  
  booktitle={2022 International Conference on Field-Programmable Technology (ICFPT)},
  
  title={NetPU: Prototyping a Generic Reconfigurable Neural Network Accelerator Architecture},
  
  year={2022},
  month = {dec},
  pages={1-1},
  doi={10.1109/ICFPT56656.2022.9974206}}

  Downloads

  NetPU_Prototyping_a_Generic_Reconfigurable_Neural_Network_Accelerator_Architecture [PDF]

  Permalink

  https://cfaed.tu-dresden.de/publications?pubId=3460

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