Chair News

Published on

The Chair for Compiler Construction was represented at this year's International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIX). Andres Goens presented our work on compact mappings to multicore systems.

In a conference which is well-known for its flexible program, allowing plenty of discussions and networking, the paper spawned various discussions after being presented. This fit well into the friendly atmosphere of the SAMOS conference, where our researchers could meet and discuss with top researchers from around the globe; this is depicted well by the Picture of Prof. Yale Patt's beachnote, in the gallery below.

Published on

The CC chair had a strong participation with three papers in this year’s ACM Federated Computing Research Conference (FCRC), a premier international event with 13 conferences and workshops (including PLDI and ISCA). The FCRC had around 2700 attendees over the course of the entire week and featured keynotes by Geoffrey Hinton and Yann LeCun, prominent machine learning researchers.  Asif Khan presented our work on “Optimizing Tensor Contractions for Embedded Devices with Racetrack Memory Scratch-Pads” at the 20th ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, Tools and Theory of Embedded Systems (LCTES) to about 40 attendees. Dr. Norman Rink presented our work on "TeIL: a type-safe imperative Tensor Intermediate Language" at the 6th ACM SIGPLAN International Workshop on Libraries, Languages, and Compilers for Array Programming (ARRAY) to around 30 attendees. Alexander Brauckmann, a student currently working with Sebastian Ertel and Andres Goens, presented our work on  "A case study on machine learning for synthesizing benchmarks" at the 3rd ACM SIGPLAN International Workshop on Machine Learning and Programming Languages (MAPL) also to around 30 attendees. We are very excited with the exchanges that took place during the different events and with the possibilities for future work and collaboration that this publications opened. 

Published on

The Groupement De Recherche System On Chip, Systèmes embarqués et Objets Connectés (GdR-SOC2) in France connects hundred of researchers working at different levels, from devices to systems, for future SOCs. In 2019, the yearly meeting of the GdR-SOC2 took place in Montpellier, hosted by the Polytech Montpellier – Université de Montpellier, from June 19 to June 21. Prof. Castrillon was invited to give a keynote in the design and methods topical area organized by Maxime Pelcat. His talk, entitled “SoC programming in the era of the Internet of Things, machine learning and emerging technologies”, touched upon current research activities in the CC Chair including (i) adaptive execution of embedded dataflow applications (Tetris), (ii) tensor expression languages and their important role for analyzing and optimizing kernels in machine learning (TeIL, TeML), and (iii) how these high level abstractions can be leveraged to optimize for emerging systems with, e.g., racetrack memories. The talk was attended by 170 researchers spawning interesting discussions.

Published on

This year, the chair for Compiler Construction participated at the long night of sciences, 'Lange Nacht der Wissenschaften'. Two of our members, Hasna Bouraoui and Andres Goens presented collaborative efforts from our Transitive Efficient Template Runtime System (TETRiS) project.

With a demo game inspired by the computer game, Tetris (not to be confused with TETRiS), we could explain concepts of mapping multiple applications dynamically to a system-on-chip platform. We had several visits, mostly kids, who wanted to discover how a compiler can play the Tetris game, "Auch ein compiler spielt Tetris". This offered the kids the opportunity  to get to know in a simple way  parts of the world behind multicore compilers, in a funny and short Tetris game.

Our members also presented a demo of energy consumption on an Odroid board, showing how we can save energy while using the TETRiS system on a hetergenous platform.

 

Published on

Five members of the CC Chair participated in the 2019 Rewe Team Challenge Dresden (4x5km). Conny Okuma, Andres Goens, Christian Menard and Jeronimo Castrillon made a mixed team that got place 690 with a total time of 1:45:44. Gerald Hempel joined other cfaed and DCN colleagues in a mixed team that made place 1169 with a total time of 1:51:24. There’s room for improvement for next year!!

Published on

The chair for compiler construction is hosting Amani Younsi and Taher Aouayeb for a short term project with the support of the  German Academic Exchange Service (DAAD). Amani and Taher, are working towards their final graduation project at National School of Computer Science (ENSI) in Tunisia. The internship is planned for 5 months in the context of a collaboration between ENSI with Prof. Chadlia Jerad from the University of Manouba, and the CC chair. Hasna Bouraoui, a Phd Student in CCC, will be helping as an advisor of the students. Amani will be working on performance analysis of a deep learning based speaker/speech recognition algorithm on heterogeneous platform. Taher will be working on the design and development of a compiler for a multi-core platform of FlexPRET machines.  

Published on

On the 21st of January, Prof. Castrillon co-organized and act as program chair for the 10th workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures 8th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms (PARMA-DITAM’19). The workshop had around 30 attendees and discussed interesting topics from many-core architectures, support for approximate machine learning, and programming models and compilers. Hasna Bouraoui gave the seventh talk at the workshop, on “Comparing Dataflow and OpenMP Programming for Speaker Recognition Applications”, a collaborative work with Prof. Chadlia Jerad from University of Manouba and University of Carthage.

 

Published on

The chair for compiler construction contributed with a demonstration to the IEEE 5G Summit Dresden, held at the International Congress Center on the 25th of September. Robert Khasanov together with Till Smejkal from the Chair of Operating Systems demonstrated recent research results on compiler-assisted run-time adaptivity, an integral part of the HAEC collaborative research center. The demonstration builds on previously published works, mainly work on general symmetries in hardware and their application to software mapping at runtime. 

Published on

The chair for compiler construction was represented by Andres Goens during a special session on “scalable and flexible manycore mapping techniques ” at the 12th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC-18) in Hanoi, Vietnam. The session also included talks from Takashi Abe (DENSO, Japan),  Anuj Pathania (with Prof. Tulika Mitra at NUS, Singapore) and Tobias Schwarzer (with Prof. Jürgen Teich at FAU, Germany).  Andres presented his work “On the Representation of Mappings to Multicores”, which argued for abstractly studying the mathematical representations of mappings for different research questions. 

Published on

We are happy to host Joonas Multanen as visiting PhD researcher for the next four months. Joonas received his M.Sc.degree in Electrical Engineering from Tampere University of Technology (TUT) in 2015. He is currently a graduate student at the Laboratory of Pervasive Computing in TUT. His research interests include energy efficient computer architectures, emerging memory technologies and computer graphics. Joonas will give a talk on  "Instruction Stream Energy Optimization”, describing his PhD research work. Previously, Joonas has worked to improve the energy-efficiency of instruction streams in processors, with the goal being fixed-function accelerator energy-efficiency, but with the flexibility brought by programmability. The research visit aims to apply emerging memory technologies to processor instruction streams and to develop techniques to improve their performance and energy-efficiency when used as instruction storages.